Method for generation of accurate doppler-free local clock in satellite/wireless networks

ABSTRACT

A method for generating a Doppler-free local clock in a communications network having a master reference terminal ( 400 ) and a terminal ( 200 ) exchanging reference and management bursts, includes steps for determining a transmit timing correction value responsive to the management burst received by the master reference terminal ( 400 ), determining a receive timing correction value responsive to the reference burst received by the terminal ( 200 ), and adjusting the frequency of a clock responsive to both the transmit timing correction value and the receive timing correction value to thereby generate the Doppler-free local clock.

This application is based on and claims priority from provisional patentapplications, Ser. Nos. 60/062,497, 60/064,673 and 60/062,496, which areincorporated herein by reference for all purposes.

BACKGROUND OF THE INVENTION

The present invention relates generally to methods for generating aclock in satellite and/or wireless networks. More specifically, thepresent invention relates to methods for generating an accurate,Doppler-free local clock in satellite and/or wireless networks.

In a distributed satellite/wireless network based on Time DivisionMultiple Access (TDMA) technology, terminals need a highly stable localtiming source (i.e., clock) to generate TDMA frame timing and togenerate terrestrial interface clocks. One option is to require anexpensive timing source in every terminal, which is inappropriate forlarge low-cost networks. A second option, that has been used to date, isto install a highly stable clock at the Reference Terminal (RT) only;traffic terminals (TTs) use an inexpensive voltage controlled oscillator(VCXO) or a direct digital synthesizer (DDS) with a free running,inexpensive oscillator, that is fine-tuned to derive a stable clock. Thereference terminal transmits a reference burst once per TDMA frame time.The traffic terminal's receive frame timing is modified based onarrivals of the reference bursts. Periodically, the traffic terminaltransmits a management burst to the reference terminal; the referenceterminal reports the error in timing to the traffic terminal, which inturn modifies its transmit frame timing appropriately. The controlinformation for tuning the VCXO or DDS is derived from the timingcorrections made to the terminal receive timing. Effectively, the VCXOor DDS is tuned so that the derived local clock is phase locked to thereceived reference burst arrival rate.

The above method results in a traffic terminal clock that is as stableas the reference terminal clock, over any given large time period. Anydrift in the local oscillator is automatically removed. However, thetraffic terminal clock includes the Doppler frequency caused by thedaily movement of the satellite, which is caused due to orbitimperfections. Hence, in any 24-hour period, the derived clock rate willvary by ±D, where D is the maximum change in clock rate caused byDoppler. Several different approaches have been proposed to correct thelocal clock with respect to a precision clock. For example, U.S. Pat.No. 4,602,375 discloses a procedure for correcting a clock onboard asatellite using drift prediction. In contrast, U.S. Pat. No. 4,639,680discloses the use of an average of phase error signals in determining anappropriate clock correction value. Both U.S. Pat. Nos. 4,602,375 and4,639,680 are incorporated herein by reference for all purposes.

A satellite/wireless TDMA system requires an accurate local clock ateach traffic terminal to transmit and receive bursts in synchronism withthe TDMA frame timing established by a reference terminal. The transmitand receive frame counters are hardware counters that repeatedly countfrom 0 to N−1 and are clocked by the local clock. N is the length of theTDMA frame expressed in units of the clock cycle time. The transmitframe counter is used to position transmit bursts within a frame; thereceive frame counter is used to position an “aperture” around theexpected receive time of every burst.

Differences in the actual rates of the clocks used by the referenceterminal and the traffic terminal cause the reference burst to arriveslightly earlier or slightly later than the expected arrival time at thetraffic terminal. The traffic terminal measures this time difference forevery arriving reference burst and adjusts the local receive framecounter to either extend the next frame time or to shorten the nextframe time, as appropriate. This correction is referred to as a ReceiveTiming Correction (RTC). With this procedure, the receive frame timingof the local terminal “tracks” the transmit frame timing of thereference terminal. The rate of these corrections is equal to thedifference in frequencies between the local clock and the referenceterminal clock; for example, if the frequency difference is n Hz, thenthe receive timing will be correct, on average, by n units every second.

Another factor that contributes to the frequency difference between thereference terminal and a traffic terminal clocks is the relativesatellite motion. As the distance between a terminal and the satellitechange, due to imperfections in satellite orbit, the delay between thelocal terminal and the reference terminal changes. This results inreference bursts arriving earlier or later at the local terminal, whichresults in corrections to the local receive frame counter. Hence, therate of change of the receive timing corrections is not just a functionof the difference in frequencies between the local clock and thereference terminal clock, but it is also a function of the rate ofchange of satellite delay (referred to as satellite Doppler).

A similar procedure is used to track the transmit timing of the trafficterminal. The traffic terminal periodically transmits a management burstto the reference station. Differences in the clocks used by thereference terminal and the local terminal cause the management burst toarrive slightly earlier or slightly later than the expected arrival timeat the reference terminal. The reference terminal measures this timedifference for every arriving management burst and sends the differencevalue to the traffic terminal. The traffic terminal in turn adjusts thelocal transmit frame counter to either extend the next frame time or toshorten the next frame time, as appropriate. This correction is referredto as a Transmit Timing Correction (TTC). With this procedure, thetransmit frame timing of the traffic terminal “tracks” the receive frametiming of the reference terminal. The rate of these corrections is afunction of the difference in frequencies between the local clock andthe reference terminal clock and the rate of change of satellite delay.Transmit timing correction can also be accomplished by a trafficmonitoring its own management burst, if possible, and measuring thetiming error.

Traditionally, RTC has been used as a basis for adjusting the frequencyof the local oscillator. The rate of receive corrections has been usedas a correction factor that is applied to the local oscillator. Thelocal oscillator is adjusted such that the net amount of correctionsmade to the receive frame counter is zero over any extended period oftime. In simple terms, if the net amount of RTCs is positive, the localoscillator frequency is decremented by an appropriate amount; if it isnegative, its frequency is incremented by an appropriate amount. Thelong term stability of the local clock is the same as that of thereference clock; however, the local clock includes the daily variationsof satellite Doppler.

Consider a simple example, where the reference terminal clock frequencyis R, the traffic terminal clock frequency is also R, the trafficterminal clock is not corrected based on RTC, and the satellite totraffic terminal distance is decreasing at a constant rate. Receiveframes will be shortened in time, causing receive timing to be correctedat a rate of d bits/sec, where d is such that the received bit rateappears to be R+d instead of R due to satellite Doppler. Frame timingtransmitted by the local terminal using the clock rate R will similarlybe shortened at arrival at the reference terminal due to the Doppler.The reference terminal will send transmit timing corrections to thetraffic terminal to delay its transmit timing. The rate of timingcorrections as seen at the traffic terminal will be −d. Hence, in steadystate, the receive timing correction rate will be d and the transmittiming correction rate will be −d.

Now consider the same example except that the local clock frequency haschanged to R−r due to drift in the local oscillator frequency. Assumingno corrections are made to the local clock, the RTC rate will become d+rand the TTC rate will become −d+r.

Thus, if the traditional clock correction algorithm, which is based onRTC rate, is allowed to operate, the local clock rate will change fromR−r to R−r+d+r, i.e., R+d, the RTC rate will become 0, and the TTC ratewill become −2d. The net effect is that the local clock drift r isremoved but the resultant clock includes the Doppler component.

What is needed is a clock generation algorithm (CGA) whichadvantageously employs measured timing error information toautomatically remove both clock drive and satellite Doppler from thelocal clock of a traffic terminal. Stated another way, what is needed isa CGA which reproduces an accurate clock at the traffic terminal whoselong-term stability matches that of the frequency standard residing atthe reference terminal and that is free of satellite Doppler. Moreover,what is needed is a clock that advantageously can be used to provideclocks on terrestrial interfaces, i.e., components coupled to thetraffic terminal. Furthermore, it would be desirable if the hardwaredevice required to implement the CGA could be a low-cost component,e.g., a voltage controlled oscillator (VCXO) or a direct digitalsynthesizer (DDS) coupled to a free running oscillator.

SUMMARY OF THE INVENTION

Based on the above and foregoing, it can be appreciated that therepresently exists a need in the art for a method for generating anaccurate, Doppler-free clock in satellite and/or wireless networks whichovercomes the above-described deficiencies. The present invention wasmotivated by a desire to overcome the drawbacks and shortcomings of thepresently available technology, and thereby fulfill this need in theart.

The present invention is a method for producing a Doppler-free localclock Advantageously, this Doppler-free local clock can be used toprovide an accurate signal to systems connected to traffic terminalswhich are not equipped with respective precision clocks.

One object according to the present invention is to provide a method forproducing a local clock at each traffic terminal that is free of thefrequency offset caused by Doppler due to satellite motion.Advantageously, this Doppler-free local clock can be used to clock outdata to terrestrial interfaces without passing satellite Doppler.

Another object according to the present invention is to provide a methodfor controlling either a low cost VCXO or a low cost DDS with anassociated free-running oscillator at traffic terminals to therebygenerate a Doppler-free local clock.

Still another object according to the present invention is to provide amethod for generating a Doppler-free local clock irrespective of whetherthe associated network is a single beam (or global beam) TDMA network ora multibeam TDMA network.

Still another object according to the present invention is provide amethod for generating a Doppler-free local clock employing an adaptiveaveraging period, which provides rapid responsiveness when the frequencyoffsets are relatively large and more precise measurements andcorrections when frequency offsets are relatively small.

These and other objects, features and advantages according to thepresent invention are provided by a method for generating a Doppler-freelocal clock in a communications network including a master referenceterminal and a terminal exchanging reference and management bursts.Advantageously, the method includes steps for determining a transmittiming correction value responsive to the management burst received bythe master reference terminal, determining a receive timing correctionvalue responsive to the reference burst received by the terminal, andadjusting the frequency of a clock responsive to both the transmittiming correction value and the receive timing correction value tothereby generate the Doppler-free local clock.

These and other objects, features and advantages according to thepresent invention are provided by a method for generating a Doppler-freelocal clock in a communications network including a master referenceterminal and a terminal exchanging reference and management bursts.Preferably, the method includes steps for initialing the masterreference terminal responsive to a first reference burst generated bythe master reference terminal, determining a transmit timing correctionvalue responsive to the management burst received by the masterreference terminal, determining a receive timing correction valueresponsive to a second reference burst received by the terminal, andadjusting the frequency of a clock responsive to both the transmittiming correction value and the receive timing correction value tothereby generate the Doppler-free local clock.

These and other objects, features and advantages according to thepresent invention are provided by a method for generating a Doppler-freelocal clock in a communications network including a master referenceterminal and a terminal exchanging reference and management burstsPreferably the method includes steps for:

(1) initializing the master reference terminal responsive to a firstreference burst generated by the master reference terminal,

(2) determining a transmit timing correction value responsive to themanagement burst received by the master reference terminal,

(3) determining a receive timing correction value responsive to a secondreference burst received by the terminal, and

(4) accumulating the transmit timing correction value and the receivetiming correction value to thereby generate a total accumulated errorvalue,

(5) determining whether a frequency adjustment is required responsive tothe total accumulated error value,

(6) when the frequency adjustment is not required, repeating the steps(2) and (3),

(7) when the frequency adjustment is required, calculating an adjustmentvalue which is applied to the frequency of a clock responsive to thetotal accumulated error value to thereby generate the Doppler-free localclock.

According to one aspect of the present invention the calculating stepuses the formula

f=(yn−prevyn)/Tc/2+yn/Ty/2

where

yn is the total accumulated error, since the last receive acquisitionwas successfully performed,

prevyn is the value of yn when the previous clock correction was made,

f is the adjustment value indicative of the required change in referencefrequency (Rf) in Hz,

Ty is a constant, and

Tc is the time since f was last computed.

BRIEF DESCRIPTION OF THE DRAWINGS

These and various other features and aspects of the present inventionwill be readily understood with reference to the following detaileddescription taken in conjunction with the accompanying drawings, inwhich like or similar numbers are used throughout, and in which:

FIG. 1 is a high level block diagram of a satellite network employingthe method for generation a Doppler-free local clock according to thepresent invention;

FIG. 2 is a representational diagram of the various clock and offsetsassociated with global beam operation of the system illustrated in FIG.1;

FIG. 3 is a representational diagram of the various clock and offsetsassociated with spot beam operation of the system illustrated in FIG. 1;

FIG. 4 is a high level block diagram of the timing control block ineither the master reference terminal or the secondary reference terminalillustrated in FIG. 1;

Fig. 5 is a high level block diagram of one preferred embodiment of thetiming control block located in the traffic terminal illustrated in FIG.1;

FIG. 6 is a high level block diagram of another preferred embodiment ofthe timing control block located in the traffic terminal illustrated inFIG. 1;

FIG. 7 is a flowchart illustrating the operation of the circuitryillustrated in FIG. 5;

FIG. 8 is a flowchart illustrating the operation of the circuitryillustrated in FIG. 6;

FIGS. 9 and 10 are charts illustrating frequency response and totalaccumulated error, respectively, for a large impulse to the circuitryillustrated in FIGS. 5 and 6;

FIGS. 11 and 12 are charts illustrating frequency response and totalaccumulated error, respectively, for a relatively small random error inthe Doppler-free local clock employed in the circuitry illustrated inFIGS. 5 and 6.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

As discussed above, when a traditional clock correction algorithm basedon RTC rate is allowed to operate, the local clock rate will change fromR−r to R−r+d+r, i.e., R+d and, thus, the RTC rate will become 0 whilethe TTC rate will become −2d. The net effect is that the local clockdrift r is removed but the resultant clock includes the Dopplercomponent.

The method for generating a Doppler-free local clock according to thepresent invention works by changing the local clock not based on the RTCrate but based on the average of the RTC and TTC rates. In the examplementioned immediately above, this average is equal to ((d+r)+(−d+r))/2,i.e., r. Hence, the local clock rate changes from R−r to R, the RTC ratewill become d, and the TTC rate will become −d. It will be appreciatedthat this is the fundamental step that advantageously allows the localclock to be corrected to the reference terminal clock value withoutincluding the Doppler component.

The method for generating a Doppler-free algorithm requires a localoscillator feeding a software controllable clock generator. For example,this hardware requirement advantageously can be satisfied by either avoltage controlled oscillator (VCXO) or a direct digital synthesizer(DDS). The output of the VCXO or DDS is the derived local clock, whichbeneficially can be employed to operate the associated local TDMA framecounters and to generate receive and transmit frame timing.

Before beginning a detailed discussion of method for generating aDoppler-free local clock according to the preferred embodiments of thepresent invention, a brief discussion of the system employing the novelmethods according to the present invention will be presented whilereferring to FIGS. 1 through 3, wherein at least one traffic terminal(TT) 200 is operatively connected to a master reference terminal (MRT)400 via a satellite 300. The system advantageously can include asecondary reference terminal (SRT) 500, which is depicted in block formin FIG. 1. It should be mentioned that the inventive method is equallyadvantageous for systems, i.e., a network with global beams or a networkwith spot beams, wherein the Master Reference Terminal (MRT) can receiveits own transmissions. Such a system is depicted in alternative ways inFIGS. 1 and 2.

Referring first to FIG. 1, the system controlled according to a firstembodiment of the novel methods of the present invention consists of aMRT 400 connected to at least one terminal (TT) 200 via a satellite 300.As illustrated in FIG. 2, the terminal 200 preferably includes amodulator 204 for generating a signal of frequency f, operativelycoupled to a transmitter 202, which is attached to an antenna (FIG. 1).Advantageously, terminal 200 includes a receiver 206 operativelyconnected to both the antenna of FIG. 1 and a demodulator 208. All ofthe components 202, 204, 206, and 208 are controlled by a controller210, which controller is connected to a memory 212 storing various datavalues, all of which will be discussed in greater detail below.Preferably, the terminal 200 also includes a timing control block 214,the operation on which will be discussed in greater detail below.Several non-limiting, possible configurations of the timing controlblock are discussed below with respect to FIGS. 5 and 6.

Still referring to FIG. 1, the MRT 400 advantageously can include amodulator 404 for generating a signal at a predetermined frequency,which modulator is operatively coupled to a transmitter 402, which isattached to the antenna of FIG. 1. Advantageously, MRT 400 also includesa receiver 406 operatively connected to both the antenna of FIG. 1 and ademodulator 408. All of the components 402, 404, 406, and 408 arecontrolled by a controller 410, which controller is connected to amemory 412 storing various data values, all of which will be discussedin greater detail below. Preferably, MRT 400 also includes a timingcontrol block 414, the operation on which will also be discussed ingreater detail below.

FIG. 2 illustrates the relationships between the various clocks andoffsets in a communication system capable of global beam operation. Thefollowing notations are used in FIG. 2:

d0,d1 Uplink Doppler at the MRT 400 and IT 200

e Frequency inaccuracy of the TT local oscillator

Δf Frequency errors at various reference points

T Measurement interval for timing correction

Δtr Amount of receive timing correction

Δtt Amount of transmit timing correction

From FIG. 2, it will be appreciated that the start of receive frame(SORF)/start of transmit frame (SOTF) instants at the satellite 300 donot drift in time due to Doppler (except for short term fluctuations).Moreover, the rate of SORF arrivals at the satellite 300 is a multipleof R, i.e., the reference terminal clock frequency.

In contrast, FIG. 3 illustrates the relationships between the variousclocks and offsets for spot beam operation in the communication system.It will be appreciated that the SORF/SOTF instants at the secondaryreference terminal (SRT) 500 do not drift in time due to Doppler (exceptfor short term fluctuations). The rate of SORF instants at the SRT 500is a multiple to R, i.e., the reference terminal clock frequency. Therate of SORF instants at the satellite 300 is a function of R and theDoppler rate.

The circuitry preferably included in the timing control block 414 of MRT400 will now be described with respect to FIG. 4, in which numeral 4141indicates a transmit frame counter while numeral 4142 indicates areceive frame counter. Both of the frame counters 4141 and 4142 receivea reference clock R from reference oscillator 4143. Moreover, both ofthe frame counters advantageously receive transmit and receivecorrection signals for a timing correction processor 4144, the operationof which will be described in greater below.

The circuitry preferably included in a first preferred embodiment of thetiming control block 214 of TT 200 will now be described with respect toFIG. 5, in which numeral 2141 indicates a transmit frame counter whilenumeral 2142 indicates a receive frame counter. Both of the framecounters 2141 and 2142 receive a reference clock Rf from voltagecontrolled oscillator (VCXO) 2143. Moreover, both of the frame countersadvantageously receive transmit and receive correction signals for atiming correction processor 2144, the operation of which will bedescribed in greater below. It should also be mentioned that a clockcorrection processor 2145 advantageously is included, which receivesinputs from the timing correction processor 2144 and outputs a frequencycorrection signal to the VCXO 2143. In an exemplary case, the frequencycorrection signal can one of a numeric value applied to a digital toanalog converter (DAC) 2145 a or an analog signal capable of controllingthe VCXO 2143 directly.

The circuitry preferably included in a second preferred embodiment ofthe timing control block 214′ of TT 200 is illustrated in FIG. 6, inwhich numeral 2141 indicates a transmit frame counter while numeral 2142indicates a receive frame counter. Both of the frame counters 2141 and2142 receive a reference clock Rf from direct digital synthesizer (DDS)2146 coupled to a free running oscillator 2147. Moreover, both of theframe counters 2141 and 2142 advantageously receive transmit and receivecorrection signals for a timing correction processor 2144, the operationof which will be described in greater below. It should also be mentionedthat a clock correction processor 2145′ advantageously is included,which receives inputs from the timing correction processor 2144 andoutputs a frequency correction signal to the DDS 2146.

The method for generating a Doppler-free local clock according to thepresent invention will now be described while referring to FIGS. 4-6.First the clock control procedure used to initialize clock in the MRT400 advantageously will be discussed with respect to FIG. 4 and then thealternative procedures for correcting the clock in TT 200 will bedescribed with respect to FIGS. 5 and 6.

Referring now to FIG. 4, after receive synchronization is achieved, theMRT 400 measures the receive timing error rn, which is the offsetbetween the arrival time of a looped back reference burst (RB) and theexpected arrival time of the RB, based on the locally generated receiveframe time. See FIG. 4. It will be appreciated that the timing errormeasurement is performed using the clock R under the control of thetiming correction processor 4144, which receives the receive timingerror signal developed by the frame counter 4142. Subsequently, a checkis performed to determine if the absolute value of the receive timingerror |rn| is greater than a predetermined threshold, e.g., 4. When |rn|exceeds the threshold, the receive frame counter 4142 is adjusted byrn/2 while the transmit frame counter 4141 is adjusted by −rn/2. Whenthe threshold is not exceeded, the frame counter are not adjusted. Afterone round trip time, i.e., when the effect of a transmit correction onthe transmit frame counter 4141 appears at the receive side of MRT 400,the above procedure is repeated.

Referring generally to FIGS. 5 and 6, the clock correction procedure forthe Traffic Terminal (TT) 200 will now be described. It will beappreciated from the discussion above that the traffic terminal (TT) 200may employ either a VCXO 2143 or a DDS with a free running oscillator2146,2147 to clock the transmit and receive frame counters 2141, 2142.The objective of TT 200 clock control is to reproduce a Doppler-freeclock Rf at TT 200. It should be mentioned that the receive timing erroris measured at the TT 200 as the offset between the arrival time of a RBand the expected arrival time of the RB, based on the locally generatedreceive frame time. It should also be mention that the transmit timingerror is measured at the MRT 400 as the offset between the arrival timeof a TT management or control burst and its nominal arrival time in theMRT 400 receive frame time. The MRT 400 sends the measured timing errorto the TT 200 over a signaling channel of the satellite 300. Asillustrated in FIGS. 5 and 6, timing corrections are performed byadjusting frame counters 2141 and 2142 and frequency corrections areperformed by changing the clock frequency of either VCXO 2143 or DDS2146. Finally, is must be mentioned that terrestrial interface clocksadvantageously are generated by a phase locked loop (PLL) from aDoppler-free local clock.

The alternative clock correction procedures for TT 200 are illustratedin FIGS. 7 and 8. Before discussing those procedures in detail, it wouldfacilitate understanding of the procedures to discuss the nomenclatureused therein. The various parameters employed in FIGS. 7 and 8 aredefined as follows:

rn: amount of correction made to receive frame counter, in bits, at anygiven receive timing correction event. A positive value implies that thereceive timing was adjusted to the “right,” implying that the localclock is faster than the received clock. Rn (and tn) measurements areexpressed in bits at the Rf clock rate.

tn: amount of correction made to transmit frame counter in bits at anygiven transmit timing correction event. A positive value implies thatthe transmit timing was adjusted to the “right,” implying that the localclock is faster than the receive clock at the reference terminal.

yn: total accumulated error, since the last receive acquisition wassuccessfully done.

prevyn: value of yn when the previous clock correction was made

f: the required change in reference frequency (Rf) in Hz. Rf should bedecreased by f. A positive value of f implies that the local clock Rf isfaster than R.

T measurement period; in seconds; a multiple of the frame period.

Th: Threshold value used for triggering correction [recommended value4].

Tmax: Maximum period without triggering correction [recommended value60-120 seconds].

Ty: See below.

Tc: See below.

un: VXCO correction voltage value.

wn: VXCO total voltage value.

C, a: VCXO parameters; see below.

Referring first to FIGS. 5 and 7, the clock control procedure for the TT200 equipped with a VCXO 2143 will now be described. As a preliminarymatter, it should be mentioned that during receive frame acquisition, wnis set to the value saved in a local database. It should also bementioned that, in general, whenever wn is changed, its value is savedin the database in non-volatile memory. During terminal installation, wnis set to a nominal value. After receive frame acquisition has beencompleted, yn is initialized to 0. Receive timing corrections arethereafter accumulated into counter yn. After transmit frame acquisitionis complete, transmit timing corrections are also accumulated intocounter yn. The accumulation is performed during Step 1.

Approximately every control frame time, i.e., the time between transmittiming corrections, yn is evaluated during Step 2. If |yn−prevyn|>Th orT>=Tmax seconds, then the subsequent procedural step are executed. Whenthe conditions are not satisfied, Steps 1 and 2 are repeated. It shouldbe mentioned that T is the amount of time elapsed in seconds since thepervious execution of Step 4. It will also be appreciated that T is amultiple of the control frame time, which is a fixed system constant.The comparison T>=Tmax should be done by counting the number of framesreceived, not by looking up some local calendar clock or time.

Before discussing the subsequent procedural steps, it would be helpful,for complete understanding of the method for generating a Doppler-freelocal clock, to discuss the rational behind the check “|yn−prevyn|>Th.”In steady state, in general, rn and tn will periodically increment anddecrement due to Doppler by the same amount. However, the actualinstants of incrementing and decrementing will be unrelated. Hence, ynwill vary over time by +−1. Hence, the system should not make clockcorrections if |yn−prevyn|<=1. A threshold of 4 has been chosen insteadof 1, to allow the possibility of a missed tn correction. Note that tncorrections are made once per control frame, based on an exchange ofmessages between a TT 200 and a RT (400 or 500, while rn corrections aremade autonomously by TT 200 on every received frame. Moreover, even ifyn does not change, it is possible that yn is not 0; the system shouldadjust the clock to bring yn to 0, which is the reason for the “T >=Tmaxsec” check.

During Step 3, the frequency correction value f is computed be clockcorrection processor 2145, using the following values and expressions:

Tc=time since Step 3 was last executed,

if |yn|<=0 or |yn|>=8

Ty=12(seconds)

else

Ty=Tmax

f=(yn−prevyn)/Tc/2+yn/Ty/2

prevyn=yn.

It should be mentioned that the factor (yn−prevyn)/Tc/2 is the recentlymeasured clock difference; the frequency is immediately adjusted by thisamount. The factor yn/Ty/2 is the frequency change needed to correct ynwithin the next Ty seconds, where yn is the number of “bits” that haveaccumulated thus far. Ty preferably is selected based on the value ofyn. When yn is relatively small, then a large value of Ty is selected tocause a small, slow change in frequency; when yn is relatively large,then a small value of Ty is selected to cause a high change infrequency. The smallest value of Ty (12) should be several times thecontrol frame period. The largest value of Ty (Tmax) should be 2 to 8times 1/fmin, where fmin is the smallest change in frequency implementedby the hardware in TT 200.

It should, be noted that during the time when receive synchronization isachieved but transmit synchronization is not, strictly speaking, thevalue of “f” computed above underestimates the frequency difference byhalf. Hence, f could be multiplied by 2 during this phase. If it is not,then the method for generating a Doppler-free local clock according tothe present invention will still converge to the right value; it willjust take a bit longer.

During Steps 4 and 5, the output frequency of VCXO 2143 advantageouslycan be adjusted using the value f from Step 3 to compute the value wn,which is provided as input to the VCXO 2143. During Step 4, the value unis computed from the expression un =f*C/a and, during Step 5, wn iscomputed using the expression wn=wn+un. It should be mentioned that C isa constant =2**16/(VCXO input voltage range), where 16 is the number ofinput bits of the DAC 2145 a connected to VCXO 2143. Furthermore, “a” isthe slope of the voltage to frequency curve of the VCXO 2143 in Hz/volt,e.g., −121 Hz/volt. Normally, “a” is a negative number, i.e., a positivevoltage causes a reduction in frequency. Since the value un provided tothe hardware can only take discrete values (−n, . . . −1,0,1, . . . ),it will be rounded to the nearest integer. It should be mentioned thatwhen the value of “a” used in the above equation does not exactly matchthe value of a′ implemented by the VCXO 2143, then the amount ofcorrection f′ will not be equal to −f. If −2f<f′<0, then the methodaccording to the present invention will iteratively converge to theright value of Rf. This implies that a′/a must be <2.

Referring now to FIGS. 6 and 8, the clock control procedure for the TT200 equipped with a DDS 2146 will now be described. As a preliminarymatter, it should be mentioned that during receive frame acquisition, Rfis set to the value saved in the local database. In general, whenever Rfis changed, its value is saved in the database in non-volatile memory.During terminal installation, Rf is set to a nominal value. Afterreceive frame acquisition has been completed, yn is initialized to 0.Receive timing corrections are thereafter accumulated into counter yn.After transmit frame acquisition is complete, transmit timingcorrections are also accumulated into counter yn. The accumulation isperformed during Step 11.

Approximately every control frame time, i.e., the time between transmittiming corrections, yn is evaluated during Step 12. If |yn−prevyn|>Th orT>=Tmax seconds, then the subsequent procedural step are executed. Whenthe conditions are not satisfied, Steps 11 and 12 are repeated. Itshould be mentioned that T is the amount of time elapsed in secondssince the pervious execution of Step 4. It will also be appreciated thatT is a multiple of the control frame time, which is a fixed systemconstant. The comparison T>Tmax should be done by counting the number offrames received, not by looking up some local calendar clock or time.

During Step 13, the frequency correction value f is computed be clockcorrection processor 2145, using the following values and expressions:

Tc=time since Step 13 was last executed,

if |yn|<=0 or |yn|>=8

Ty=12(seconds)

else

Ty=Tmax

f=(yn−prevyn)Tc/2+yn/Ty/2

prevyn=yn.

It should be mentioned that the factor (yn−prevyn)/Tc/2 is the recentlymeasured clock difference; the frequency is immediately adjusted by thisamount. The factor yn/Ty/2 is the frequency change needed to correct ynwithin the next Ty seconds, where yn is the number of “bits” that haveaccumulated thus far. Ty preferably is selected based on the value ofyn. When yn is relatively small, then a large value of Ty is selected tocause a small, slow change in frequency; when yn is relatively large,then a small value of Ty is selected to cause a high change infrequency. The smallest value of Ty (12) should be several times thecontrol frame period. The largest value of Ty (Tmax) should be 2 to 8times 1/fmin, where fmin is the smallest change in frequency implementedby the hardware in TT 200.

It should be noted that during the time when receive synchronization isachieved but transmit synchronization is not, strictly speaking, thevalue of “f” computed above underestimates the frequency difference byhalf. Hence, f could be multiplied by 2 during this phase. If it is not,then the method for generating a Doppler-free local clock according tothe present invention will still converge to the right value; it willjust take a bit longer.

During Step 14, the frequency of DDS 2146 advantageously can be adjustedusing the expression Rf=Rf−f, where the value of f is simply subtractedfrom the current value of Rf. It should be noted that since the value Rfgiven to the hardware of TT 200 can only take on certain discrete values(n*F), it will be rounded to the nearest integer.

It should be mentioned at this point that when the output of the VCXO2143 or DDS 2145 is not Rf but Rf*x, where x is a positive real number,i.e., Rf is derived from output of the VCXO or DDS using a multiplier ordivider at a later stage, then f should be multiplied by x in the aboveequations.

FIGS. 9-12 illustrate the operation of the circuitry in TT 200 inresponse to system changes. For example, FIG. 9 illustrates the outputof the inventive method in response to a relativley large impulse input.In the FIG. 9, T=3 seconds, the initial Rf=20.001 MHZ, R=20 MHZ,Doppler=0. Freq. Change granularity={fraction (1/32)} Hz. FIG. 10illustrates the total accumulated error yn for the same scenario.Alternatively, FIGS. 11 and 12 illustrate Rf and yn perturbations when a10⁻⁸ per second random error is introduced into the clock Rf, using theparameters T=3 seconds, initial Rf =˜20 MHZ, R=20 MHZ, Doppler=0, andFreq. Change granularity={fraction (1/32)} Hz.

It should be mentioned that the method for generating a Doppler-freelocal clock according to the present invention described aboveadvantageously can also be used for onboard processing/switchingsatellite systems, such as emerging Ka-band geosynchronous multimediasatellite systems and low earth orbit (LEO) processing satellitesystems. In these systems, the method reproduces a Doppler-free clockwhich is locked to the reference clock on board the satellite.

It should also be noted that the clock generation algorithm describedabove advantageously can also be used for point-to-pointwireless/satellite systems, e.g., in point-to-point wireless/satellitemodems. In other words, accurate timing from one modem can bedistributed to the other modem using this method. In these latter systemad suitable Time Division Multiplex (TDM) framing structure can be usedto implement frame timing measurement and timing correction.

Although presently preferred embodiments of the present invention havebeen described in detail hereinabove, it should be clearly understoodthat many variations and/or modifications of the basic inventiveconcepts herein taught, which may appear to those skilled in thepertinent art, will still fall within the spirit and scope of thepresent invention, as defined in the appended claims.

What is claimed is:
 1. A method for generating a Doppler-free localclock in a communications network including a master reference terminaland a terminal exchanging reference and management bursts, comprisingsteps for: (1) determining a transmit timing correction value responsiveto the management burst received by the master reference terminal; (2)determining a receive timing correction value responsive to thereference burst received by the terminal; and (3) adjusting thefrequency of a clock responsive to both said transmit timing correctionvalue and said receive timing correction value to thereby generate theDoppler-free local clock.
 2. The method for generating the Doppler-freelocal clock as recited in claim 1, wherein said step (3) furthercomprises the steps of: (3)(i) accumulating said transmit timingcorrection value and said receive timing correction value to therebygenerate a total accumulated error value; and (3)(ii) adjusting thefrequency of a clock responsive to said total accumulated error value tothereby generate the Doppler-free local clock.
 3. The method forgenerating the Doppler-free local clock as recited in claim 1, whereinsaid step (3) further comprises the steps of: (3)(i) accumulating saidtransmit timing correction value and said receive timing correctionvalue to thereby generate a total accumulated error value; (3)(ii)determining when a frequency adjustment is required responsive to saidtotal accumulated error value; and (3)(iii) adjusting the frequency of aclock responsive to said total accumulated error value to therebygenerate the Doppler-free local clock.
 4. The method for generating theDoppler-free local clock as recited in claim 1, wherein said step (3)further comprises the steps of: (3)(i) accumulating said transmit timingcorrection value and said receive timing correction value to therebygenerate a total accumulated error value; (3)(ii) determining when afrequency adjustment is required by comparing said total accumulatederror value to a previously stored total accumulated error value; and(3)(iii) adjusting the frequency of a clock responsive to said totalaccumulated error value to thereby generate the Doppler-free localclock.
 5. The method for generating the Doppler-free local clock asrecited in claim 1, wherein said step (3) further comprises the stepsof: (3)(i) accumulating said transmit timing correction value and saidreceive timing correction value to thereby generate a total accumulatederror value; (3)(ii) determining when a frequency adjustment is requiredby comparing the number of frames received by the terminal with apredetermined maximum value; and (3)(iii) adjusting the frequency of aclock responsive to said total accumulated error value to therebygenerate the Doppler-free local clock.
 6. The method for generating theDoppler-free local clock as recited in claim 1, wherein said step (3)further comprises the steps of: (3)(i) accumulating said transmit timingcorrection value and said receive timing correction value to therebygenerate a total accumulated error value; (3)(ii) determining when afrequency adjustment is required by comparing said total accumulatederror value to a previously stored total accumulated error value; and(3)(iii) adjusting the frequency of a clock responsive to said totalaccumulated error value to thereby generate the Doppler-free local clockusing the formula: f=(yn−prevyn)/Tc/2+yn/Ty/2 where: yn is the totalaccumulated error, since the last receive acquisition was successfullyperformed, prevyn is the value of yn when the previous clock correctionwas made, f is the required change in reference frequency (Rf) in Hz,Ty, is a constant, and Tc is the time since f was last computed.
 7. Themethod for generating the Doppler-free local clock as recited in claim1, wherein said step (3) further comprises the steps of: (3)(i)accumulating said transmit timing correction value and said receivetiming correction value to thereby generate a total accumulated errorvalue; (3)(ii) determining when a frequency adjustment is required bycomparing the number of frames received by the terminal with apredetermined maximum value; and (3)(iii) adjusting the frequency of aclock responsive to said total accumulated error value to therebygenerate the Doppler-free local clock using the formula:f=(yn−prevyn)/Tc/2+yn/Ty/2 where: yn is the total accumulated error,since the last receive acquisition was successfully performed, prevyn isthe value of yn when the previous clock correction was made, f is therequired change in reference frequency (Rf) in Hz, Ty is a constant, andTc is the time since f was last computed.
 8. A method for generating aDoppler-free local clock in a communications network including a masterreference terminal and a terminal exchanging reference and managementbursts, comprising steps for: (1) initializing the master referenceterminal responsive to a first reference burst generated by the masterreference terminal; (2) determining a transmit timing correction valueresponsive to the management burst received by the master referenceterminal; (3) determining a receive timing correction value responsiveto a second reference burst received by the terminal; and (4) adjustingthe frequency of a clock responsive to both said transmittiming-correction value and said receive timing correction value tothereby generate the Doppler-free local clock.
 9. The method forgenerating the Doppler-free local clock as recited in claim 8, whereinsaid step (4) further comprises the steps of: (4)(i) accumulating saidtransmit timing correction value and said receive timing correctionvalue to thereby generate a total accumulated error value; and (4)(ii)adjusting the frequency of a clock responsive to said total accumulatederror value to thereby generate the Doppler-free local clock.
 10. Themethod for generating the Doppler-free local clock as recited in claim8, wherein said step (4) further comprises the steps of: (4)(i)accumulating said transmit timing correction value and said receivetiming correction value to thereby generate a total accumulated errorvalue; (4)(ii) determining when a frequency adjustment is requiredresponsive to said total accumulated error value; and (4)(iii) adjustingthe frequency of a clock responsive to said total accumulated errorvalue to thereby generate the Doppler-free local clock.
 11. The methodfor generating the Doppler-free local clock as recited in claim 8,wherein said step (4) further comprises the steps of: (4)(i)accumulating said transmit timing correction value and said receivetiming correction value to thereby generate a total accumulated errorvalue; (4)(ii) determining when a frequency adjustment is requiredresponsive to said total accumulated error value; (4)(iii) when thefrequency adjustment is not required, repeating said steps (2) and (3);and (4)(iv) when the frequency adjustment is required, adjusting thefrequency of a clock responsive to said total accumulated error value tothereby generate the Doppler-free local clock.
 12. The method forgenerating the Doppler-free local clock as recited in claim 8, whereinsaid step (4) further comprises the steps of: (4)(i) accumulating saidtransmit timing correction value and said receive timing correctionvalue to thereby generate a total accumulated error value; (4)(ii)determining when a frequency adjustment is required by comparing saidtotal accumulated error value to a previously stored total accumulatederror value; and (4)(iii) adjusting the frequency of a clock responsiveto said total accumulated error value to thereby generate theDoppler-free local clock.
 13. The method for generating the Doppler-freelocal clock as recited in claim 8, wherein said step (4) furthercomprises the steps of: (4)(i) accumulating said transmit timingcorrection value and said receive timing correction value to therebygenerate a total accumulated error value; (4)(ii) determining when afrequency adjustment is required by comparing the number of framesreceived by the terminal with a predetermined maximum value; and(4)(iii) adjusting the frequency of a clock responsive to said totalaccumulated error value to thereby generate the Doppler-free localclock.
 14. The method for generating the Doppler-free local clock asrecited in claim 8, wherein said step (4) further comprises the stepsof: (4)(i) accumulating said transmit timing correction value and saidreceive timing correction value to thereby generate a total accumulatederror value; (4)(ii) determining when a frequency adjustment is requiredby comparing said total accumulated error value to a previously storedtotal accumulated error value; and (4)(iii) adjusting the frequency of aclock responsive to said total accumulated error value to therebygenerate the Doppler-free local clock using the formula:f=(yn−prevyn)/Tc/2+yn/Ty/2 where: yn is the total accumulated error,since the last receive acquisition was successfully performed, prevyn isthe value of yn when the previous clock correction was made, f is therequired change in reference frequency (Rf) in Hz, Ty is a constant, andTc is the time since f was last computed.
 15. The method for generatingthe Doppler-free local clock as recited in claim 8, wherein said step(4) further comprises the steps of: (4)(i) accumulating said transmittiming correction value and said receive timing correction value tothereby generate a total accumulated error value; (4)(ii) determiningwhen a frequency adjustment is required by comparing the number offrames received by the terminal with a predetermined maximum value; and(4)(iii) adjusting the frequency of a clock responsive to said totalaccumulated error value to thereby generate the Doppler-free local clockusing the formula: f=(yn−prevyn)/Tc/2+yn/Ty/2 where: yn is the totalaccumulated error, since the last receive acquisition was successfullyperformed, prevyn is the value of yn when the previous clock correctionwas made, f is the required change in reference frequency (Rf) in Hz, Tyis a constant, and Tc is the time since f was last computed.
 16. Amethod for generating a Doppler-free local clock in a communicationsnetwork including a master reference terminal and a terminal exchangingreference and management bursts, comprising steps for: (1) initializingthe master reference terminal responsive to a first reference burstgenerated by the master reference terminal; (2) determining a transmittiming correction value responsive to the management burst received bythe master reference terminal; (3) determining a receive timingcorrection value responsive to a second reference burst received by theterminal; and (4) accumulating said transmit timing correction value andsaid receive timing correction value to thereby generate a totalaccumulated error value; (5) determining whether a frequency adjustmentis required responsive to said total accumulated error value; (6) whenthe frequency adjustment is not required, repeating said steps (2) and(3); (7) when the frequency adjustment is required, calculating anadjustment value which is applied to the frequency of a clock responsiveto said total accumulated error value to thereby generate theDoppler-free local clock using the formula: f(yn−prevyn)/Tc/2+yn/Ty/2where: yn is the total accumulated error, since the last receiveacquisition was successfully performed, prevyn is the value of yn whenthe previous clock correction was made, f is the adjustment valueindicative of the required change in reference frequency (Rf) in Hz, Tyis a constant, and Tc is the time since f was last computed.
 17. Themethod for generating the Doppler-free local clock as recited in claim16, wherein the terminal includes a direct digital synthesizer (DDS)operatively coupled to a free running oscillator, and wherein saidmethod further comprises the step of: (8) applying said adjustment valueto said DDS.
 18. The method for generating the Doppler-free local clockas recited in claim 16, wherein the terminal includes a voltagecontrolled oscillator (VCXO), and wherein said method further comprisesthe step of: (8) calculating a corrected voltage value responsive tosaid adjustment value; (9) calculating an applied voltage valueresponsive to said corrected voltage value and a previously applied VCXOvoltage; and (10) applying said applied value to said VCXO.